Allyanz Electronics, Semiconductors, Integrated Modules, Displays. Manufacturers Representative & Distributor Australia, NZ & South East Asia. Tel: +61.3.9759 5949
ISSI Now Sampling 1Gbit & 2Gbit DDR3 DRAM
ISSI is now sampling its 1Gbit 1.5V DDR3 DRAM. Samples of the x16 data width option are now shipping (IS43TR16640A for Commercial and Industrial, or IS46TR16640A for Automotive). Samples of the x8 data width option will begin to ship soon (IS43TR81280A for Commercial and Industrial, or IS46TR81280A for Automotive).
The DDR3 interface is a popular interface for the latest microprocessors, ASICs, and ASPs. One of the advantages with DDR3 over predecessor technologies is the higher throughput: ISSI’s initial samples reach data rates of 1600 MT/s (800 MHz), with plans to support higher data rates in future.
ISSI DDR3 features include:
- Bidirectional differential data strobe
- Data masking per byte on Write commands
- Programmable burst length of 4 or 8
- Programmable CAS Latency
- Auto-Refresh and Self-Refresh Modes
- OCD (Driver Adjustment)
- ODT (On Die Termination) supported
- Write Leveling
- Packages: 96-ball BGA for x16, 78-ball BGA for x8
- Long-term support
“The expansion of broadband infrastructure in data centers and customer-premise equipment are driving system designers to incorporate DDR3 DRAMs into their products. These applications also have long-life requirements, so ISSI’s commitment to long-term support of the 1Gbit and 2Gbit DDR3 products will be important for our customers in the communications and networking markets,” said Ron Kalakuntla, vice president of marketing at ISSI. Key applications are Automotive multimedia, navigation and clusters, along with the communications market segment, which includes access and aggregation nodes, routers and switches, network storage, optical transport and base stations.
Please contact Allyanz today to place your sample order.
Lattice Semiconductor Announces Serial Image Sensor Bridge Support For Sony IMX136/104
Lattice Semiconductor Corporation (NASDAQ: LSCC), has announced the release of a serial sub-LVDS bridge design to support the Sony IMX136 and IMX104 image sensors. The serial sub-LVDS format is expected to become Sony’s primary image sensor interface for embedded/industrial users.
This new image sensor bridge design utilizes the low cost, low power Lattice MachXO2(tm) PLD (programmable logic device) to interface to the serial sub-LVDS bus of the Sony IMX136 or IMX104 image sensor. Applications that can benefit from this design include Surveillance cameras, Video conferencing and Industrial cameras.
This image sensor bridge design allows an ISP (Image Signal Processor) with a CMOS parallel interface bus to connect to the Sony IMX136 or IMX104. The Lattice MachXO2-1200 device interfaces directly to the sub-LVDS I/Os and no external discrete components are required. The image sensor bridge application can support 1080P60 resolution with a 12-bit ISP interface.
If customers desire the full 1080P120 capability of the Sony IMX136 or IMX104, then the design code in the MachXO2 device can be modified easily to accommodate this. The image sensor bridge design is available now for download, and the MachXO2-1200 is in full production.
Key features:
- Complete Reference Designs in MachXO2-1200 or XP2-5
- Designed to Emulate Parallel Sensor Output Bus Width of 10 or 12 Bits
- Serial sub-LVDS interface to CMOS SDR data
- Legacy sub-LVDS parallel DDR to CMOS SDR also available
- Tested with Sony IMX036 and TI DM812X at 1080p60
- Converts the Sub-LVDS Sync Commands to Line Valid and Frame Valid Signals
- Bridge Device Offered in Space-saving 8×8 mm 132-Ball csBGA. TQFP Packages Also Available.
- Requires No External PROM
- Parallel Interface can be Configured for 1.8V, 2.5V or 3.3V LVCMOS Levels
To obtain the Sony IMX136 or IMX104 serial image sensor bridge design files, visit http://www.latticesemi.com/products/intellectualproperty/referencedesigns/sonyimx036sensorwithsublv.cfm , or please contact Allyanz.