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Lattice MachXO2 PLD’s

Lattice MachXO2 PLD – Processor I/O Expansion with MachXO2 Cuts Cost and Reduces Power

Using the Lattice MachXO2 PLD’s hardened block functions you can easily add extra functions and more I/Os to a low pin count/low cost MCU based design. This reduces component cost, saves board space and saves power vs. using a higher pin count MCU. Also, the MachXO2 carries no overhead since it needs no configuration device.


Lattice MachXO2 PLD - Processor I/O

  • Discover how the hardened dual I2C, SPI, and Timer/Counter functions augment the flexible I/Os and logic blocks in the MachXO2 to efficiently support MCU-based designs.
  • See how a sensor monitoring solution example takes full advantage of the MachXO2 I/O expansion capabilities.
  • Watch the 7-minute video to better understand how the MachXO2 efficiently integrates system functionality and how easy it is to get started with free design tools, IP trials and reference designs.



Visit the “Lattice MachXO2 I/O Expansion” web page
to explore the full capabilities of the MachXO2 as an MCU I/O expansion device, or please
contact Allyanz todayfor more details.

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