Specialist Supplier Of Electronic Components, Semiconductors & Rugged Electronic Systems.

Allyanz Electronics, Semiconductors, Integrated Modules, Displays. Manufacturers Representative & Distributor Australia, NZ & South East Asia. Tel: +61.3.9759 5949

ISSI Now Offering UFS 2.1/2.2 - Universal Flash Storage

- Low-voltage supplies: 1.8V, 1.1V
- I/O at 1.1V (LPDDR4) or 0.6V (LPDDR4X)
- Clock Frequency Range : 10MHz to 2133MHz
- Data rates from : 20Mbps to 4266 Mbps per I/O
16n Pre-fetch DDR Architecture
- Multiplexed, double data rate, command/address inputs
- ZQ Calibration
- Mobile features for lower power
- Long-term, reliable support  

- Low-voltage supplies: 1.8V, 1.1V
- I/O at 1.1V (LPDDR4) or 0.6V (LPDDR4X)
- Clock Frequency Range : 10MHz to 2133MHz
- Data rates from : 20Mbps to 4266 Mbps per I/O
16n Pre-fetch DDR Architecture
- Multiplexed, double data rate, command/address inputs
- ZQ Calibration
- Mobile features for lower power
- Long-term, reliable support  

- Low-voltage supplies: 1.8V, 1.1V
- I/O at 1.1V (LPDDR4) or 0.6V (LPDDR4X)
- Clock Frequency Range : 10MHz to 2133MHz
- Data rates from : 20Mbps to 4266 Mbps per I/O
16n Pre-fetch DDR Architecture
- Multiplexed, double data rate, command/address inputs
- ZQ Calibration
- Mobile features for lower power
- Long-term, reliable support  

LVDS Serial Interface
ISSI Now Offering UFS 2.1/2.2 - Universal Flash Storage
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Lattice Launches Industry-First PQC-Ready FPGA Family: MachXO5-NX TDQ

Sets new standard for secure control FPGAs with full CNSA 2.0-compliant post-quantum cryptography, crypto-agility, and hardware Root of Trust for next-generation infrastructure

Lattice Semiconductor, the low power programmable leader, has introduced Lattice MachXO5™-NX TDQ family, the industry’s first secure control FPGAs with full Commercial National Security Algorithm (CNSA) 2.0-compliant post-quantum cryptography (PQC) support.

Built on the award-winning Lattice Nexus™ platform, MachXO5-NX TDQ FPGAs deliver unmatched security, reliability, and flexibility for Computing, Communications, Industrial, and Automotive applications as the threat of quantum-enabled cyberattacks rises.

“Quantum computing advances increase the urgency to adopt quantum-resistant security across every industry,” said Esam Elashmawi, Chief Strategy and Marketing officer, Lattice Semiconductor. “With MachXO5-NX TDQ, Lattice is first to market with a secure control FPGA family that not only meets today’s security mandates but also delivers crypto-agility and hardware root of trust to future-proof our customers’ infrastructure against evolving threats.”

 

Lattice-MachXO5D-NX-FPGA-family

 

The Lattice MachXO5-NX TDQ FPGA family equips customers with:

  1. Full Suite of CNSA 2.0 Compliant PQC
    1. First and only complete CNSA 2.0 and National Institute of Standards and Technology (NIST)-approved PQC algorithms (LMS, XMSS, ML-DSA, ML-KEM, AES256-GCM, SHA2, SHA3, SHAKE) for robust protection against quantum threats
    2. Authenticated and/or encrypted bitstream ensuring data integrity and protection against unauthorized access with ML-DSA, LMS, XMSS, AES256
    3. Unique, patent pending crypto-agility with in-field algorithm update capability and anti-rollback version protection to enable ongoing alignment with evolving standards
    4. Secure bitstream key management with revokable root keys and sophisticated key hierarchy for both PQC and classical keys
  2. Advanced Cryptography
    1. Full complement of advanced symmetric and classical asymmetric cryptographic algorithms (AES-CBC/GCM 256 bit, ECDSA-384/521, SHA-384/512, RSA 3072/4096 bit) for bitstream and user data protection
    2. Device Identifier Composition Engine (DICE), Security Protocol and Data Model (SPDM), and Lattice SupplyGuard™ capable, providing attestation and secure lifecycle/supply chain management for future-proof, end-to-end security
  3. Hardware Root of Trust (RoT)
    1. Trusted single-chip boot with integrated flash
    2. Unique device secret (UDS) ensuring distinct device identity
    3. Integrated non-volatile configuration memory and user flash memory (UFM) with flexible partitioning and secure locking
    4. Comprehensive locking control of programming interface (SPI, JTAG), providing complete protection
    5. Side Channel Attack (SCA) resiliency and NIST Cryptographic Algorithm Validation Program (CAVP) compliant algorithms

Lattice also expanded its RoT-enabled Lattice MachXO5-NX device family with new MachXO5-NX TD devices that offer new density and package options.

These new Lattice MachXO5-NX TDQ and MachXO5-NX TD FPGA devices are available and have shipped to industry-leading Communications and Compute customers, and are supported by the latest release of Lattice Radiant™ design software.

For more details or if you would like to discuss your design needs, please contact Allyanz.

ISSI Expands Family of 50nm High Performance Serial NOR Flash to Include 125°C Capable Devices

ISSI is excited to announce the expansion of its high-density Serial NOR Flash offerings by adding 125°C support to its 50nm 512Mb, 1Gb, and 2Gb devices.

This new family of devices (IS25WP/LP-J series) builds upon the current family of IS25WP/LP-G series devices by adding 125°C capability.

The new J-series will be fully backwards compatible to the G series and is offered in densities starting from 512Mb to 2Gb.

The IS25WP/LP-J series supports temperatures up to 125°C with AEC-Q100 (Automotive).

512Mb and 1Gb Flash supporting 3.3V is now sampling.

For more details or if you would like samples for your design, please contact Allyanz.

 


 

Lattice Introduces New Secure Control FPGA Family with Advanced Crypto-Agility and Hardware Root of Trust

New Nexus-based MachXO5D-NX FPGAs and Sentry solution stack optimized for evolving security landscape with industry-standard compliant, crypto-agile, and class-leading RoT features

Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, has expanded its leadership in security-focused hardware and software with the launch of two new solutions to address customer challenges around increasing threats to system security.

The company has released the Lattice MachXO5D™-NX family of advanced secure control FPGAs, offering crypto-agile algorithms, hardware root of trust features with integrated flash, and fail-safe remote field updates for reliable and secure product lifecycle management. In addition, Lattice launched the latest version of the Lattice Sentry™ solution stack, featuring new capabilities to equip customers with customizable FPGA-based platform firmware resiliency (PFR) solutions supporting the new MachXO5D-NX family.

“At Lattice, we’re focused on addressing our customers’ evolving security needs and helping them stay ahead of accelerating cyberthreats to system data and infrastructure,” said Dan Mansur, Corporate Vice President of Product Marketing at Lattice Semiconductor. “Crypto-agile security based on hardware root of trust devices is increasingly fundamental in this digital age, and we’re excited to further expand our product portfolio with the MachXO5D-NX FPGA family and the latest Sentry solution stack release.”

 

Lattice-MachXO5D-NX-FPGA-family

 

Key features and performance highlights of the new low power Lattice MachXO5D-NX FPGAs based on the Lattice Nexus™ FPGA platform include:

  1. Advanced Cryptographic Agility
    1. Security algorithms specified by the Commercial National Security Algorithm (CNSA) Suite for bitstream and user data protection, including AES-256, ECDSA-384/521, SHA2-256,384/512, and RSA 3072/4096
  2. Hardware Root of Trust
    1. Immutable boot ROM, enabling secure-dual boot with integrated flash for fail-safe updates
    2. Unique Device Secret (UDS) protecting device identity
    3. Side channel attack (SCA) resiliency
    4. Integrated non-volatile configuration memory and up to 57 Mb of configurable user flash memory (UFM) for user data storage and management
    5. Fully configurable programming interface (SPI, JTAG) locking control preventing advanced external attacks
  3. Reliable and Secure Product Lifecycle
    1. Secure on-chip multi-boot with bitstream encryption and authentication, enabling fail-safe remote field updates
    2. Anti-rollback version protection and revocable root keys, protecting against malicious bitstream attacks and ensuring design integrity
    3. DICE and Lattice SupplyGuard™ capability for secure product lifecycle and supply chain management

Enabling NIST SP800-193 compliant PFR solution development for Communications, Computing, Industrial, and Automotive applications, the Lattice Sentry (v 4.0) solution stack now includes:

  1. Multiple QSPI/SPI monitoring with I2C peripheral attack protection demonstration
  2. SPDM and MCTP support for efficient platform management and secure and seamless server operations
  3. A new design workspace template reference design that enables PFR 4.0 solution with I3C support, newer crypto algorithms (ECC384/512), and full DC-SCM compatibility
  4. Expanded plug-and-play design tools and reference designs with workspace template, and policy, provisioning, and manifest generator

The new MachXO5D-NX FPGA family and the latest Sentry solution stack are supported by the latest releases of award-winning Lattice Radiant™ and Lattice Propel™ design software.

For more details or if you would like samples for your design, please contact Allyanz.

 


ISSI offers wide range of Low Pin Count RAM Solutions

ISSI low pin count RAM solution

ISSI is now offering a wide range of Low Pin Count RAM solutions in a variety of serial interfaces:

  • SPI
  • QPI
  • Quad DDR (x4 xSPI)
  • OPI (Octal)
  • HyperBus™.

ISSI Low Pin Count RAM Solution, SerialRAM, OctalRAM, HyperRAM, QUADRAM, Serial SRAM

 

ISSI-low-pin-count-RAM-solution-DATA

ISSI-low-pin-count-RAM-solution-DATA4

ISSI-low-pin-count-RAM-solutions-table

ISSI’s new RAM devices are ideally suited to high performance MCUs that typically have interfaces to Low-Pin Count RAM products.

These products are also offered in a user-friendly range of densities from 512Kb to 512Mb, making them ideal for Industrial, Automotive, and IoT types of applications.

For more details or if you would like samples for your design, please contact Allyanz.

 


ISSI Now Sampling the Read-While-Write (RWW) Octal Flash

ISSI offers a complete portfolio of Octal Memory that supports high-speed, low pin count devices utilizing the JEDEC xSPI interface.

The Octal (xSPI) interface enhances system performance, simplifies design, and reduces system cost.

ISSI’s new family of Octal products include: Octal (xSPI) FlashOctal RAM, and Octal MCP solutions. Octal (xSPI) Flash memory delivers the performance needed for embedded systems that require fast, instant boot times.

ISSI’s Octal Flash delivers 400 MB/s of read bandwidth, which is over 4x times faster than a Quad SPI Flash. The Read While Write (RWW) feature further enhances the Octal (xSPI) family by allowing these devices to be read, while being programmed. Applications such as OTA (Over The Air) update require RWW functionality.

256Mb/512Mb RWW samples are available now. 64Mb RWW samples are expected to be available May-June 2024.

For more details or if you would like samples for your design, please contact Allyanz.

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